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Tomaitheous Elder

Joined: 27 Sep 2005 Posts: 306 Location: Tucson
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Posted: Sat Mar 18, 2006 11:17 pm Post subject: MagicEngine save states |
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David, do you have a break down of were eveything is saved in the ME save states? Like the CPU regs, RAM, VDC VRAM/REGS, ROM, VCE regs, etc.
Thanks,
Rich _________________ www.pcedev.net |
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dmichel Admin

Joined: 04 Apr 2002 Posts: 1166 Location: France
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Posted: Sun Mar 19, 2006 7:52 am Post subject: |
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No, I don't have this info, everything is written sequentialy in big chuncks (one for the CPU, one for the VDC, etc..), there are no structs. Is this important? _________________ David Michel |
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Tomaitheous Elder

Joined: 27 Sep 2005 Posts: 306 Location: Tucson
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Posted: Sun Mar 19, 2006 8:36 am Post subject: |
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Quote: | Is this important? |
It would help in translation/gfx hack projects. Locating the VRAM and rebuilding the BAT from the save state shouldn't be a problem, but trying to find the SATB pointer, palette data, MMU, RAM, etc in the save state would require a good amount of time. _________________ www.pcedev.net |
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kingshriek Visitor

Joined: 19 Mar 2006 Posts: 3
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Posted: Sun Mar 19, 2006 8:46 am Post subject: |
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This info applies to ME version 1.0.0 PR 10.
Data chunks (that dmichel mentioned) begin with an ASCII string (ex. "CPU", "IO", "PSG", "VCE", "VDC", "RAM", etc.).
Specific data (specified as offset from beginning of ASCII string):
IO+0x1C - current counter value (TIQ)
IO+0x20 - counter modulo ($1FEC00)
CPU+0x30...CPU+0x37 - MPR0-MPR7
RAM+0x14 - standard 8K RAM begins here (loc. of $1F0000)
additional RAM (if present) follows right after standard 8K RAM ends
That's about all I know (really just what's useful for HES ripping). |
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Tomaitheous Elder

Joined: 27 Sep 2005 Posts: 306 Location: Tucson
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Posted: Sun Mar 19, 2006 9:36 am Post subject: |
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Hey, that helps alot Kingshriek! Nice - I found the VCE palette data @ 0x8C80 in the Aldynes save state file.
Update:
Ok, palette data might not start at 0x8C80. I'll have to do some demo tests. Strange thing is that what looks like the palette data, appears to be store as a 32bit value instead of a 16 value.
Anyway, thanks for the point in the right direction  _________________ www.pcedev.net |
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dmichel Admin

Joined: 04 Apr 2002 Posts: 1166 Location: France
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Posted: Mon Mar 20, 2006 9:26 am Post subject: |
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Tomaitheous wrote: | Ok, palette data might not start at 0x8C80. I'll have to do some demo tests. Strange thing is that what looks like the palette data, appears to be store as a 32bit value instead of a 16 value. |
Yes, all the registers are saved in 32-bit words, even the CPU 8-bit registers. _________________ David Michel |
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Tomaitheous Elder

Joined: 27 Sep 2005 Posts: 306 Location: Tucson
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Posted: Tue Apr 04, 2006 1:06 am Post subject: |
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Cool, thanks David  _________________ www.pcedev.net |
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